The present invention relates to optical modules and methods of making the optical modules, or electronic devices using the optical modules and optical communication systems using the optical modules.
FIG. 13 is a configuration diagram showing a conventional optical module with a jitter transfer bandwidth being adjusted and FIG. 14 is a flow chart showing an example of procedure from assembly to shipment of the conventional optical module.
As shown in FIG. 13, a optical receiver 65 has a PD or APD 66 for conversion from alight signal into an electric signal, a transimpedance amplifier 67 for current/voltage conversion, a voltage amplifier 68, and a CDR IC 27. The CDR IC 27 has a PLL 13 which comprises a phase detector 4, a filter circuit 7 and a VCO 12, a decision circuit 14, a data output buffer 15, and a clock output buffer 16.
In adjusting a jitter bandwidth of the optical module (CDR IC 27), an output signal from a pulse pattern generator 76 is converted to a light signal by means of a standard optical transmitter 75, which light signal is inputted to the optical receiver 65 through an optical fiber 64, and a clock output 65b from the optical receiver 65 is measured by means of a jitter analyzer 77.
As shown in FIG. 14, a conventional optical module manufacturing process is divided into an optical module assembling step (including the installation of CDR IC 27), an adjusting step (an optical module jitter transfer bandwidth adjusting step), and a test step.
Thus, after assembly of the optical module, the sensitivity of APD is adjusted and the jitter transfer bandwidth is measured. If the jitter transfer bandwidth satisfies a prescribed standard, the receiving module is tested for operation and is shipped if it passes the test. On the other hand, if the jitter transfer bandwidth does not satisfy the standard, a resistor R11 is replaced and the jitter transfer bandwidth is measured again. This is repeated until satisfying the standard for the jitter transfer bandwidth.
For example, on page 3 of a catalog (MP1777A-J-A-1-(4.00), Nov. 22, 2000) of Anritsu MP1777A there is described adjusting the jitter transfer bandwidth with use of a pulse pattern generator and a jitter analyzer. In the conventional jitter transfer bandwidth adjustment, CDR IC is operated at an actual speed.